1. Field of the Invention
This invention relates to a high voltage stabilizing circuit to be adopted in such picture tube as of a color television receiver or the like.
2. Related Art Statement
In a color television receiver, an anode voltage (high voltage) to be fed to an anode of an picture tube (CRT) is obtained from a high voltage pulse generated in a secondary winding of a fly-back transformer (abbreviated as FBT hereinafter). When a power source is input, when a channel is switched and when a dark picture area is suddenly varied to a bright picture area, the variation of the luminance will be so remarkable that the anode voltage will reduce. A high voltage stabilizing circuit detects an anode voltage and controls an input voltage of an FBT in response to the detected result so as to stabilize the anode voltage.
FIG. 5 is a circuit diagram showing a prior art of such high voltage stabilizing circuit.
A radio frequency television (RF) signal induced in an antenna 31 is fed to a tuner 32, a predetermined channel signal is selected and is converted to an intermediate frequency (IF) signal. An IF detecting circuit 33 demodulates the IF signal and feeds a video signal of a base band to a sync separation circuit 34 and a video and chrominance signal processing block 13. The sync separation circuit 34 extracts horizontal and vertical synchronizing signals out of the video signal. The vertical synchronizing signal is fed to a vertical oscillating circuit 35 which generates saw tooth waves for vertically deflecting a CRT 50. A horizontal synchronizing signal is given to a horizontal oscillating and horizontal driving circuit 36 and a horizontal pulse is generated and is output to a horizontal output circuit 6.
On the other hand, the video signal from the IF detecting circuit 33 is given to a brightness controlling circuit 42 through a contrast controlling circuit 41 of the video and chrominance signal processing block 13. The contrast controlling circuit 41 controls the amplitude of the video signal on the basis of a contrast adjusting voltage and adjusts the contrast. The brightness controlling circuit 42 controls a direct current level of a video signal on the basis of a brightness controlling voltage and adjust the brightness. The video signal from the IF detecting circuit 33 is given also to a chrominance processing circuit 44 and is demodulated in the chrominance and a color-difference signal is given to a matrix circuit 43 which makes R, G and B signals from the luminance signal from the brightness controlling circuit 42 and the color-difference signal from the chrominance processing circuit 44 and gives them to the cathode of the CRT 50. By the way, as described later, the contrast controlling circuit 41 and brightness controlling circuit 42 limit respectively the amplitude and direct current level of the video signal on the basis of ABL operating voltages of terminals 58 and 14.
The horizontal output circuit 6 comprises an output transistor 1, damper diode 2, capacitor 3, horizontal deflecting yoke 4 and capacitor 5. With a collector-emitter path of the output transistor 1, the damper diode 2 and resonant capacitor 3 are connected in parallel and the series circuit of the horizontal deflecting yoke 4 and capacitor 5 is connected also in parallel. The horizontal output circuit 6 is connected to a power source terminal 8 through a primary winding of an FBT 7 and an emitter-collector path of a transistor Q1. A main power source voltage of, for example, 115 V (volts) is fed to the power source terminal 8. The emitter of the transistor Q 1 is connected to a reference potential point through a capacitor 19 and the emitter voltage is smoothed and is fed to the FBT 7. The horizontal output circuit 6 generates a fly-back pulse of a horizontal period by a horizontal pulse fed to the base of the transistor 1. This fly-back pulse is stepped up by the FBT 7 and a high voltage pulse is generated in the secondary winding and is fed to the anode of the CRT 50.
The high potential side of the secondary winding of the FBT 7 is connected to the reference potential point through resistors R5 and R6. The high voltage fluctuation is detected by the voltage division by the resistors R5 and R6 and the voltage of the connecting point of the resistors R5 and R6 is output through a buffer amplifier 15. The output of the buffer amplifier 15 is adjusted in the level by a variable resistor 16 and is given to a positive input end of an error amplifier 17. A negative input end of the error amplifier 17 is connected to the reference potential point through a power source 55 and is connected to an output end through a feedback resistor R7. The error amplifier 17 amplifies and outputs the output of the variable resistor 16. The output end of the error amplifier 17 is connected to the base of a transistor Q2 through a Zener diode 18 and resistor R8. The connecting point of the resistor R8 and Zener diode 18 is connected to the reference potential point through a resistor R9. The output of the error amplifier 17 is adjusted in the voltage by the Zener diode 18 and is impressed on the transistor Q2. The collector of the transistor Q2 is connected to the power source terminal 8 through resistors R10 and R11 and the connecting point of the resistors R10 and R11 is connected to the base of the transistor Q1. The emitter of the transistor Q2 is connected to the reference potential point through a resistor R12.
Now, if the anode voltage of the CRT 50 increases, the voltage of the connecting point of the resistors R5 and R6 will become high, the base potential of the transistor Q2 will become high and the electric current flowing to the reference point through the resistors R11 and R10, the collector-emitter path of the transistor Q2 and the resistor R12 from the terminal 8 will also increase. Then, the base potential of the transistor Q1 will reduce and the voltage fed to the primary winding of the FBT 7 will reduce. Thus, the level of the high voltage pulse induced in the secondary winding is made low and the high voltage is lowered. On the contrary, if the anode voltage is reduced, the base potential of the transistor Q2 will become low, the collector current of the transistor Q2 will become small and the base potential of the transistor Q 1 will become high. Then, the voltage fed to the primary winding of the FBT 7 will become large and the anode voltage (high voltage) will become stable.
In the circuit in FIG. 5, the high voltage current (anode current) flowing through the secondary winding of the FBT 7 is detected and is subjected to an auto-bright limit (ABL). That is to say, the low potential side of the secondary winding of the FBT 7 is connected to the reference potential point through a capacitor 9 for removing a tipple portion and is connected to the power source terminal 8 through the resistors R1, R2 and R3. The anode current flows through the resistors R3 to R1 and the FBT 7 from the power source terminal 8. With the increase of the anode current, the voltage (ABL operating voltage) of the connecting point of the resistors R1 and R2 will reduce. This connecting point is connected to the power source terminal 12 through the parallel circuits of the capacitor 10 and diode 11 and is connected to a brightness controlling terminal 14 of the video and chrominance signal processing block 13 through the diode D1 and resistor R4. The terminal 14 is connected also to the reference potential point through a capacitor C1.
Now, if the beam current (anode current) of the CRT 50 is comparatively small and the voltage of the connecting point of the resistors R1 and R2 is comparatively high as usual, the anode voltage of the diode 11 will be higher than the low voltage (of, for example, 9V) fed to the power source terminal 12 and the diode 11 will conduct. Thereby, a fixed voltage of 9V will be impressed on the terminal 14 of the video and chrominance signal processing block 13. The brightness controlling circuit 42 will not ABL operate at this low voltage of 9V.
Here, if the beam current of the CRT 50 increases over the predetermined value, then the ABL operating voltage of the connecting point of the resistors R1 and R2 will reduce to the predetermined value, the anode voltage of the diode 11 will reduce and the diode 11 will be off. Thereby, the low voltage source will be equivalent to be cut off the terminal 14 and the voltage of the terminal 14 will vary (reduce) depending on the ABL operating voltage of the connecting point of the resistors R1 and R2, that is, on the beam current of the CRT 50. When the voltage of the terminal 14 becomes below the predetermined value, a brightness controlling circuit 42 will start the ABL operation and will limit the direct current of the video signal. The ABL operating voltage will be given also to a contrast controlling circuit 41 through a diode 56, resistor 57 and terminal 58. When the terminal 58 becomes below the predetermined value, the contrast controlling circuit 41 will start the ABL operation and will reduce the amplitude of the video signal. By the ABL operation, the anode current of the CRT 50 will be limited and the increase of the average luminance will be prevented.
Now, depending on the high voltage load fluctuation or the like of the FBT 7, even by the above described high voltage stability controlling loop, high voltage fluctuation may not be controlled. FIG. 6 shows waveform diagrams for explaining this problem. FIG. 6(a) shows a video signal Vpic fed to the anode of the CRT 50, FIG. 6(b) shows an ABL operating voltage VABL and FIG. 6(c) shows a variation of a high voltage EH.
Now, for example, if the picture suddenly varies from black to white, at this varying point, the video signal fed to the anode of the CRT 50 will suddenly vary (FIG. 6(a)). Thereby, the anode current will suddenly increase and the high voltage will fall. With the fall of the high voltage, the voltage fed to the FBT 7 will increase. However, a voltage higher than the main power source voltage can not be fed to the FBT 7 and the predetermined high voltage may not be reached. That is to say, in case the anode current increases very suddenly and a voltage reduction exceeding the controlled dynamic range of a high voltage stabilizing loop is generated, as shown in FIG. 6(c), the high voltage will reduce. Then the fluctuation of the horizontal and vertical amplitude will become large and the picture quality will remarkably deteriorate.
By the way, in case a white peak current flows longer than a predetermined time, by the above described ABL operation, the anode current will be controlled and the reduction of the high voltage will be suppressed. However, by a smoothing capacitor 9 or the like, as shown by FIG. 6(b), the variation of the ABL operating voltage will be slow. Therefore, as shown in FIGS. 6(b) and (c), a comparatively long time will elapse until the brightness controlling circuit 42 or the like starts the ABL operation against the voltage reduction exceeding the controlled dynamic range of the high voltage stabilizing loop and the high voltage returns to the predetermined value.
Thus, there has been a problem that, when a sharp white peak video is displayed, the reduction of a high voltage will deviate from the controlled range of the high voltage stabilizing loop and the picture quality will remarkably deteriorate.